Integrated circuit (IC) devices include the graphics processing unit (GPU) and central processor unit (CPU) components used in modern computers. A typical IC device comprises a semiconductor die. An array of active device components (e.g., transistors) configure logic gate, register and addressable memory cell components disposed within the die. The active components of the array are operably configured into circuitry, interconnected with a network of conductive traces, leads and vertical interconnect accesses (vias) routed throughout the die. The active components of the array interact with an exchange of data signals over the conductive network.
Conductive pads and leads may couple the IC device electrically to an interposer and therewith, to a printed circuit board (PCB) and one or more an external entities associated with the PCB. For example, the IC device may thus import and export data signals and couple with an external power source associated with the PCB. An operating voltage of the IC device may be regulated by an external voltage regulator entity with which it is thus coupled.
In general, sub-microscopic technology development is diminishing the physical dimensions of IC devices even as development in related technologies raises their switching and logic frequencies and power consumption. Smaller dimensions and faster logic and switching are particularly valuable in “mobile chips,” which may comprise components in telephones, pad computers, personal digital assistants (PDA) and the like. However, greater switching frequencies and power consumption may degrade reliability and/or performance in devices with such small dimensions.
For instance, inductances introduced by conductive leads within an IC device may develop di/dt voltage drops, which may inject related noise (“di/dt noise”). The di/dt noise may reduce operating margins and switching speeds, which may constrain or limit the effective upper operating frequency that the IC device may achieve or sustain. Regulating an operating voltage of an IC device may mediate, ameliorate or at least partially prevent di/dt noise. Adequate voltage regulation may thus allow an IC device to achieve and sustain higher switching frequencies, reduce power loss, and generally improve performance.
In relation to external voltage control entities, an integrated voltage regulator (IVR) component allows an IC device faster response and/or finer grained control over its operating voltage. As an IVR is integrated within the array of active device components of the IC device itself, the IVR does not exchange voltage regulation related signals with entities external thereto (e.g., “off-chip” entities). Thus, as di/dv voltage drops may occur, e.g., from inductances internal to the IC device itself, an IVR provides fast response times to address di/dt noise as it may arise in relation thereto. Moreover, as voltage regulation related signals are not exchanged with off-chip entities, IVR components may actually deter, reduce or preclude the development of related di/dt noise. IC device IVR components also conserve PCB “real estate” or improve its spatial use efficiency. For instance, on-board area of the PCB may be used for components related to other than off-chip voltage regulation.
IVR (and indeed other voltage regulator) circuits may function with one or more power inductors, which function to reactively impede current changes over time for filtering di/dt noise and other transients. Typically, magnetic cores for conventional power inductors are implemented “on-chip,” e.g., disposed in an IC device itself, or on a semiconductor interposer to which the IC device is connected. These approaches are described in one or more of the following references:    Morrow, et al., Design and Fabrication of On-Chip Coupled Inductors Integrated with Magnetic Material for Voltage Regulators, IEEE Transactions on Magnetics 47(6), 1678-1686, IEEE (2011);    Sturken, et al., A 2.5D Integrated Regulator using Coupled Magnetic-Core Inductors on Silicon Interposer delivering 10.8 A/mm2, IEEE ISSCC 2012 Session 23 Advances in Heterogeneous Integration/23.1, 400-403, IEEE (2012).
Interposer-implemented conventional power inductors however demand additional fabrication process steps related to electroplating the inductors and surrounding magnetic material. Not only do the added process steps add complexity, cost, manufacturing time and failure probability, but the electroplating itself limits or constrains the selection of materials, e.g., metallurgically, chemically and/or electrically, that may be used, which may result in less than optimal fabrication or assembly outcomes.
While implementing conventional power inductors on an IC device with on-chip magnetic cores may add a degree of integration, the integration comes at the cost of a significant number of additional required fabrication process steps. The fabrication process also has compatibility requirements that constrain which magnetic materials may be selected for implementing the on-chip core. In addition to (or perhaps, partially because of) this constraint, conventional processes typically implement on-chip inductors with low inductance values (e.g., unless even additional costly efforts are taken to obviate using low on-chip inductances).
Further, conductor and dielectric losses typical of conventional on-chip inductors contribute significantly to effective resistance Re values thereof. These losses thus result in inductors with low quality factor values Q, which represents a ratio of the inductive reactance XL of the inductor to the effective resistance: Q=XL/Re.
Moreover, integrating the magnetic cores onto the IC device consumes or demands significant on-chip area or volume (e.g., real estate). Devoting on-chip real estate to the inductors renders at least that portion of the IC device unavailable for implementing transistors. The inductor, a single passive circuit component, thus effectively displaces multiple active circuit components, which may reduce an overall functional operability or performance capability of the IC device.
Approaches described in this Background section could, but have not necessarily been conceived or pursued previously. Unless otherwise indicated, neither approaches described in this section, nor issues identified in relation thereto, are to be assumed as recognized in any prior art merely by the discussion thereof within this section.